Verification Engineer (Verilog / UVM) - Cambridge | Zoek UK | 209a00375cfe414a82e4e7a9de4f00b8
Verification Engineer (Verilog / UVM)
Cambridge, Cambridgeshire, England
£350.00 - £430.00 PerDay
Permanent (Full time)
Our client is a multi-award-winning global technology firm that is looking to recruit a Verification Engineer to join their growing will be required to plan, design and develop UVM block level test benches for our clients GPU product.
Please double check you have the right level of experience and qualifications by reading the full overview of this opportunity below.
Main responsibilities for the role:
- Knowledge of architecting and implementing verification test benches for complex IP /module level designs using structured and maintai...